
CAD RTL/DV Infrastructure Engineer, Sr Staff
at Qualcomm
Posted 18 hours ago
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- Compensation
- Not specified
- City
- Country
- United States
Currency: Not specified
**Sr Staff CAD RTL/DV Infrastructure Engineer.** Lead team designing, implementing, and maintaining Cadence tools. Manage Jenkins pipelines, Python automation, and Verilog/UVM. Leverage Git, JIRA, and Confluence. Requires 10+ years' experience in CAD/RTL DV, proven technical leadership, and proficiency in relevant tools.
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