Custom Memory Design Engineer
at TSMC
Posted a day ago
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quantitatively-focused Custom Memory Design Engineer, leveraging extensive knowledge in SRAM assist logic and memory compilers to conceive and execute leading-edge DRAM and SRAM memory subsystem designs. Key responsibilities involve collaboratively driving design customization, integrating IP cores usingSystemC and UVM, as well as profiling memory access patterns. Must have proven proficiency in Cadence Innovus, Synopsys IC Compiler, and n Vet, along with in-depth understanding of memory design flows and optimal memory hierarchy. Ideal candidate boasts 7-10 years of relevant experience and a Bachelor's degree in Electrical or Computer Engineering. Offer additional expertise in Verilog, C++, and Python, plus exposure to machine learning applications. Apply today for this mid-senior level opportunity shaping cutting-edge memory solutions.
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