Industry not specified

DDR PHY Sr Staff Design Verification Engineer

at Qualcomm

Tech LeadNo visa sponsorshipC/C++/C#

Posted 16 hours ago

No clicks

Compensation

Not specified

Currency: Not specified

City

Not specified

Country

Not specified

**Senior Design Verification Engineer (DDR PHY) - Staff Level** Seeking Senior Design Verification Engineer with proven experience in DDR PHY for Staff-level role. Lead DV team, drive methodology improvements, and ensure high-quality sign-offs. Key responsibilities include constrained random verification, post-silicon validation, and UVM-based testbench creation using SystemVerilog. Required skills: proficient in DDR PHY, familiarity with lab tools, and experience in UVM/SVM. Ideal candidate has 8+ years' experience, with a senior-level contributor mindset.