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Design Verification - Senior Staff Engineer

at Qualcomm

Tech LeadNo visa sponsorshipC/C++/C#

Posted 19 hours ago

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**Senior Staff Engineer - Design Verification.** Drive complex design verification projects using Verilog, SystemVerilog, and UVM. Lead teams in crafting testbenches and using Assertion-Based Verification. Minimum 8 years of experience in design and verification, with expertise in advanced nodes (<28nm). Proven leadership skills and familiarity withCadence and Synopsys tools are essential. Strategic thinker with experience in high-volume semiconductor projects.