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Digital ASIC Design Engineer for Mixed-Signal IPs
at Qualcomm
Mid LevelNo visa sponsorshipC/C++/C#
Posted 16 hours ago
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**Digital ASIC Design Engineer for Mixed-Signal IPs** sought. Design custom digital circuits, utilize VHDL and Verilog, collaborate with analog/mixed-signal teams. Requires 3+ years' experience in ASIC design, proficient in digital design flows, expertise in logic synthesis and place & route. Develop mixed-signal IP blocks, work in 28nm process nodes or below.
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