Ethernet Switch ASIC Design Engineer/Sr
at Qualcomm
Posted a day ago
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- Compensation
- Not specified
- City
- Country
- China
Currency: Not specified
**Ethernet Switch ASIC Design Engineer/Sr | Qualcomm China** Design and develop high-speed Ethernet switch ASICs, specializing in logic design, RTL coding, verification, synthesis, timing closure, and physical design. Proficiency in Ethernet switching concepts, such as L2/L3 forwarding, bridging, routing, packet processing, and QoS. Experience with AXI/NoC, PCIe, and scripting skills (C/C++, Tcl, Perl) are beneficial. Collaborate cross-functionally to debug issues, support chip bring-up, and meet project deadlines. Fluent in English and Chinese (verbal and written) with strong teamwork and communication skills.
Company:
Qualcomm China
Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
Requirements:
- Familiar with ASIC development, especially logic design, RTL coding, verification, synthesis, timing closure and physical design flow
- Familiarity with Ethernet switching concepts, such as:
- L2/L3 forwarding, bridging, routing
- Packet processing pipelines
- Basic QoS (queuing, scheduling)
- Knowledge of AXI/NoC, PCIe or high-speed interfaces is a plus
- Scripting skills (C/C++, Tcl, Perl) preferred
- Excellent teamwork, interpersonal and communication skills.
- Fluent in Chinese and English both verbal and written.
- Ability to work in stressful situations with tight schedules to meet.
Description of Function & Responsibility
- Implement RTL design, synthesis, and timing closure for networking datapath/control logic
- Participating in SoC integration with focus on Ethernet switch subsystems
- Debug functional and performance issues across design, DV, and validation teams
- Collaborate with architecture, firmware, and validation teams to support chip bring-up
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
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