Formal Verification Engineer, Sr Lead
at Qualcomm
Posted 19 hours ago
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- Not specified
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- United States
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**Senior Formal Verification Engineer Lead**: Lead a team of engineers in developing, maintaining, and enhancing formal verification tools in our electronic design automation (EDA) software. Key responsibilities include defining team strategies, mentoring junior engineers, and ensuring delivery of high-quality solutions. Required skills encompass extensive experience in formal verification, expertise in UVM (Universal Verification Methodology), and proficiency in Python, SV (SystemVerilog), and Verilog. Ideal candidate should have a Bachelor's or higher degree in Computer Science, Electrical Engineering, or a closely related field, and at least 10 years of industry experience. This role calls for strong leadership, technical depth, and the ability to thrive in a dynamic, collaborative environment.
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