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FY27 Intern - Digital Design Verification Intern - Tirat Carmel
at Qualcomm
InternshipNo visa sponsorshipC/C++/C#
Posted 16 hours ago
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**FW27 Senior Digital Design Verification Intern needed for Tirat Carmel.** Lead testbench creation and verification planning for advanced digital ICs. Required: Experience with SystemVerilog, VHDL, UVM, knowledge of SoC architecture, and proficient in C/C++. Previous experience as a junior or mid-level digital design verification engineer essential. Familiarity with QuestaSim or VCS testbench simulators advantageous.
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