
Infra IP Design Verification -Staff Engineer
at Qualcomm
Posted 21 hours ago
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**Staff Infra IP Design Verification Engineer**: Lead verification of complex SoC IP blocks. Key duties include driving test strategy, writing UVM testbenches, verifying lint and cyclone stats. Essential skills: Proficient in SystemVerilog, UVM, HVL, and experience with QuestaSim/Incisive. Proven expertise in Vergil migrated IP verification rehearsal. Requires 9+ years in verification, with 3+ on complex SoC projects. Collaborate cross-functionally, mentor junior engineers.
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