Industry not specified

Infra Power Design Verification Sr Staff Engineer

at Qualcomm

Tech LeadNo visa sponsorshipC/C++/C#

Posted 17 hours ago

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Compensation

Not specified

Currency: Not specified

City

San Diego

Country

United States

**Infra Power Design Verification Sr Staff Engineer** sought for U.S.-based role. Designs and verifies power delivery network (PDN) for next-gen chips. Requires 10+ years in SoC/ASIC power design, with experience in low-power design, Schrödinger, Cadencetools, and PDN checking. Offers senior-level guidance, driving design optimizations. Collaborates cross-functionally, fosters team growth. Must-have: strong knowledge of power gating, clock gating, and power management techniques. Proficient in scripting (Python, Perl).