
Physical Design Engineer, Sr. Staff
at Qualcomm
Posted 16 hours ago
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- Compensation
- Not specified
- City
- Country
- United States
Currency: Not specified
**Senior Staff Physical Design Engineer**: Lead ASIC tapeout projects. Key: Front-end design, clock tree synthesis, STA, place and route, DFM. Must-have: 10+ yrs experience, expertise in Cadence Innovus, QRC, Questa. Proficient in hardening designs for manufacturing. Deliver power-efficient, high-performance chips. Collaborate cross-functionally.
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