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Physical Design - Sr Engineer
at Qualcomm
Mid LevelNo visa sponsorshipC/C++/C#
Posted 19 hours ago
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Senior Physical Design Engineer to head complex IC design tasks. Leads team in floorplanning, placement, and routing. Needs 8+ years design experience, proficient in Cadence Innovus/DFTMAX, Synopsys IC Compiler, Mentor's Calibre. Masters in EECS essential. Experience in high-performance computing, low-power SoCs, timing closure expertise.
No additional description provided.
