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RISCV CPU Design Verification (Multiple Levels) - Pune
at Qualcomm
Mid LevelNo visa sponsorshipC/C++/C#
Posted 16 hours ago
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- Compensation
- Not specified
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- Country
- India
Currency: Not specified
**RISC-V CPU Design Verification Engineer** needed in Pune. **Key Responsibilities**: Unit, functional, and full-chip design verification. **Required Skills**: Strong background in RISC-V CPU design, expertise in SystemVerilog, UVM, Verilator. **Proven experience** in SoC verification, proficient in Linux/Perl/Python scripting. **Senior/Mid-level** candidates encouraged.
No additional description provided.
