SerDes/DSP System, Architect - 17009
at Synopsys
Posted 18 hours ago
No clicks
- Compensation
- Not specified
- City
- Country
- United States
Currency: Not specified
**"Design and develop high-speed serial-link transceivers as our SerDes/DSP System Architect. Leverage your MSc/PhD in Electrical/Computer Engineering, along with proficient knowledge of PHY/MAC layers, for this senior-level role in Sunnyvale, CA. Dutoresponsibilities include architecture definition, performance analysis, and collaboration with cross-functional teams, utilizing tools such as MATLAB, Cadence, and Python. Proven expertise in system-level modeling, digital signal processing, and data converter implementation is essential."
You Are:
You are motivated by innovation and precision, continuously seeking to optimize performance across diverse protocols and channels. Your analytical mindset allows you to diagnose complex system-level issues, propose robust algorithms, and correlate simulated results with silicon measurements. You possess a strong understanding of equalization, coding, noise/crosstalk filtering, and are familiar with both wireline and optical protocols.
Beyond technical prowess, you are a collaborative problem-solver, eager to mentor peers and share knowledge. You value diversity and inclusivity, believing that the best solutions arise from collective perspectives. You adapt quickly to evolving technologies, maintain meticulous attention to detail, and communicate effectively with both technical and customer stakeholders. Your ambition is to be at the forefront of innovation, helping transform the industry and empower customers to achieve breakthrough results.
What You’ll Be Doing:
- Developing and maintaining SerDes system models for PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
- Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.
- Designing and proposing advanced algorithms to calibrate and adapt transceivers for optimal performance.
- Correlating simulated performance with silicon measurements to ensure accuracy and reliability.
- Providing expert assistance to customers for system-level performance issues and troubleshooting.
- Collaborating with cross-functional teams of analog, digital, and hardware engineers throughout all stages of development and post-silicon.
- Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.
- Accelerate the development of bleeding-edge silicon IP, enabling rapid integration of advanced capabilities into SoCs.
- Drive innovation in high-speed SerDes design, setting industry benchmarks for performance and reliability.
- Enhance product differentiation for customers, helping them meet unique performance, power, and size requirements.
- Reduce risk and time-to-market for complex silicon products by delivering robust, predesigned IP blocks.
- Expand the reach of Synopsys’ portfolio, supporting both wireline and optical applications across global markets.
- Empower customers with technical expertise and hands-on support, ensuring successful implementations and satisfaction.
- M.Sc. or Ph.D. in Electrical or Computer Engineering with 10+ years of relevant experience.
- Strong experience modeling circuits and systems in MATLAB/Simulink.
- Solid understanding of DSP and communications theory, including equalization, encoding, and noise/crosstalk filtering.
- Proficiency in analyzing link budgets for PAM4 high-speed serial links.
- Experience with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
- Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
- Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/system Verilog. Programming in Python is a plus.
- Innovative thinker with a passion for cutting-edge technology.
- Collaborative team player who thrives in a multidisciplinary environment.
- Analytical problem-solver with meticulous attention to detail.
- Effective communicator, able to translate complex concepts for diverse audiences.
- Adaptable and eager to learn, keeping pace with evolving industry trends.
- Customer-focused, dedicated to delivering exceptional support and results.
Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
SerDes/DSP System, Architect - 17009
at Synopsys
SerDes/DSP System, Architect - 17009
at Synopsys
Posted 18 hours ago
No clicks
- Compensation
- Not specified
- City
- Country
- United States
Currency: Not specified
**"Design and develop high-speed serial-link transceivers as our SerDes/DSP System Architect. Leverage your MSc/PhD in Electrical/Computer Engineering, along with proficient knowledge of PHY/MAC layers, for this senior-level role in Sunnyvale, CA. Dutoresponsibilities include architecture definition, performance analysis, and collaboration with cross-functional teams, utilizing tools such as MATLAB, Cadence, and Python. Proven expertise in system-level modeling, digital signal processing, and data converter implementation is essential."
You Are:
You are motivated by innovation and precision, continuously seeking to optimize performance across diverse protocols and channels. Your analytical mindset allows you to diagnose complex system-level issues, propose robust algorithms, and correlate simulated results with silicon measurements. You possess a strong understanding of equalization, coding, noise/crosstalk filtering, and are familiar with both wireline and optical protocols.
Beyond technical prowess, you are a collaborative problem-solver, eager to mentor peers and share knowledge. You value diversity and inclusivity, believing that the best solutions arise from collective perspectives. You adapt quickly to evolving technologies, maintain meticulous attention to detail, and communicate effectively with both technical and customer stakeholders. Your ambition is to be at the forefront of innovation, helping transform the industry and empower customers to achieve breakthrough results.
What You’ll Be Doing:
- Developing and maintaining SerDes system models for PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
- Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.
- Designing and proposing advanced algorithms to calibrate and adapt transceivers for optimal performance.
- Correlating simulated performance with silicon measurements to ensure accuracy and reliability.
- Providing expert assistance to customers for system-level performance issues and troubleshooting.
- Collaborating with cross-functional teams of analog, digital, and hardware engineers throughout all stages of development and post-silicon.
- Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.
- Accelerate the development of bleeding-edge silicon IP, enabling rapid integration of advanced capabilities into SoCs.
- Drive innovation in high-speed SerDes design, setting industry benchmarks for performance and reliability.
- Enhance product differentiation for customers, helping them meet unique performance, power, and size requirements.
- Reduce risk and time-to-market for complex silicon products by delivering robust, predesigned IP blocks.
- Expand the reach of Synopsys’ portfolio, supporting both wireline and optical applications across global markets.
- Empower customers with technical expertise and hands-on support, ensuring successful implementations and satisfaction.
- M.Sc. or Ph.D. in Electrical or Computer Engineering with 10+ years of relevant experience.
- Strong experience modeling circuits and systems in MATLAB/Simulink.
- Solid understanding of DSP and communications theory, including equalization, encoding, and noise/crosstalk filtering.
- Proficiency in analyzing link budgets for PAM4 high-speed serial links.
- Experience with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
- Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
- Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/system Verilog. Programming in Python is a plus.
- Innovative thinker with a passion for cutting-edge technology.
- Collaborative team player who thrives in a multidisciplinary environment.
- Analytical problem-solver with meticulous attention to detail.
- Effective communicator, able to translate complex concepts for diverse audiences.
- Adaptable and eager to learn, keeping pace with evolving industry trends.
- Customer-focused, dedicated to delivering exceptional support and results.
Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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