
HW Security Design Engineer
at Qualcomm
Posted 15 hours ago
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Senior-level HW Security Design Engineer role. Define, architected hardware security for ICs, SoCs. Requirements: Proven expertise in secure IC/SoC design, 10+ years in ASIC/FPGA, expert-level knowledge in hardware encryption, secure boot, and key management. Familiarity with SN peer review, secure coding practices, and safety classification. Adhere to industry standards: Common Criteria, FIPS, AIS 31/31-1. Experience with: Verilog, VHDL, SystemVerilog, Cadence INVC, Mentor Graphics, Synopsys VCS.
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