
ASIC RTL Design Engineer (Automotive IP/Cores) (Sr. Engr / Sr. Lead Engr)
at Qualcomm
Posted 8 hours ago
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- Compensation
- Not specified
- City
- Country
- United States
Currency: Not specified
**Senior ASIC RTL Design Engineer** sought for Automotive IP/Cores role. Lead RTL design, testbench creation, and verification using VHDL/Verilog. Experience in automotive safety protocols (Autosar, ISO26262) and}}{{}. proficiency in UVM and SystemC. Unix/Linux environment. Senior-level role requiring 10+ years' experience; lead/mentor experience preferred. Collaborate cross-functionally on automotive safety and functional safety.
No additional description provided.
