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Interface IP Verification Engineer (Pre-Silicon) - 18381

at Synopsys

Mid LevelNo visa sponsorshipOther

Posted 6 hours ago

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Compensation: Not specified
City: Austin
Country: United States

**Interface IP Verification Engineer (Pre-Silicon)** As an experienced ASIC Verification Engineer, lead interface IP verification in pre-silicon phase. Key responsibilities include defining testbenches, creating test suites, and analyzing results using tools like Plunder andpositive. Utilize Universal Verification Methodology (UVM) and SystemVerilog while working on high-speed interfaces such as PCIe, CCIX, and cache protocols. Minimum of 5 years in verification, with at least 3 focused on interface IP. Bachelor's degree in Electrical Engineering or Computer Science required. Join Synopsys and drive innovations shaping next-gen connectivity.

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from AI infrastructure and cloud computing to autonomous systems and next-generation communications.

As the leader in chip design, verification, and silicon IP, Synopsys enables the world's top semiconductor companies to accelerate innovation and bring groundbreaking products to market faster. Join us and help shape the future of technology.

The Opportunity

We're looking for an experienced ASIC Verification Engineer who is passionate about solving complex protocol challenges and delivering world-class Interface IP solutions.

In this role, you'll work on industry-leading PCIe, CXL, DDR, and Ethernet technologies that serve as foundational building blocks for AI accelerators, data centers, networking platforms, and next-generation SoCs. You'll collaborate with architects, design engineers, and verification experts to ensure the quality, performance, and reliability of technology used by leading semiconductor companies worldwide.

What You'll Do

Own verification of complex Interface IP solutions, including PCIe, CXL, DDR, and Ethernet technologies.

Architect, develop, and enhance scalable UVM-based verification environments and reusable verification IP.

Define verification strategies and test plans from specification review through product release.

Develop constrained-random, coverage-driven verification solutions using SystemVerilog and UVM.

Drive functional coverage closure and verification signoff activities.

Debug challenging RTL, protocol, and system-level issues while improving verification efficiency and automation.

Partner closely with architecture, RTL, firmware, and systems teams to identify issues early and ensure robust product quality while also mentoring engineers contributing to verification methodology improvements across the organization.

Why This Role Matters

The Interface IP you help verify will be integrated into some of the world's most advanced semiconductor products. Your work will directly impact the performance, reliability, and success of technologies powering:

AI and machine learning platforms

Cloud and hyperscale data centers

High-performance computing systems

Networking and communication infrastructure

Automotive and intelligent edge applications

What You'll Bring

BSEE/MSEE with at least 5 years of direct industry experience with proven experience verifying complex ASIC or SoC designs.

Deep expertise with SystemVerilog and UVM methodologies.

Strong protocol knowledge in one or more of the following areas:

PCI Express (PCIe), Compute Express Link (CXL), DDR Memory Interfaces, Ethernet

Experience developing constrained-random and coverage-driven verification environments.

Strong debugging and problem-solving skills spanning RTL, verification, and protocol compliance.

Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.

Ability to independently drive technical initiatives while collaborating across geographically distributed teams.

Preferred

Experience with verification IP development, assertion-based verification and formal methodologies with knowledge of modern SoC architectures and high-speed communication interfaces.

What Success Looks Like

Deliver robust, high-quality verification solutions for complex Interface IP products.

Improve verification coverage, reusability, and execution efficiency.

Influence verification methodologies and best practices across engineering teams.

Drive successful product releases with exceptional quality standards.

Help develop the next generation of verification talent through technical mentorship and leadership.

The Team

You'll join a team of highly skilled verification engineers responsible for developing and verifying industry-leading Interface IP solutions. Working alongside experts in architecture, design, and verification, you'll tackle some of the semiconductor industry's most challenging technical problems while contributing to products deployed worldwide.

Why Synopsys

At Synopsys, you'll work on technology at the heart of the semiconductor ecosystem. Our IP, EDA, and silicon solutions enable innovation across AI, automotive, cloud computing, mobile, and high-performance computing markets.

Here, you'll have the opportunity to:

Solve complex technical challenges.

Work alongside industry-recognized experts.

Influence products used across the global semiconductor industry.

Advance your technical leadership and career growth.

Contribute to technologies shaping the future of computing.

Rewards and Benefits

Synopsys offers a comprehensive package of health, wellness, financial, and professional development benefits designed to support you throughout your career.

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