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IP Methodology & Design Flow Engineer

at TSMC

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Posted 21 hours ago

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A Software Engineer focused on IP Methodology & Design Flow is needed. Develop scalable designs for large-scale SoCs, leveraging expertise in digital circuit design, Verilog/VHDL, and system-level modeling. Minimum 7+ years' experience. Proficiency in design tools like Synopsys, Cadence, and Mentor Graphics essential. Collaborate cross-functionally, driving improvements in IP methodology and design flow. Familiarity with UVM (Universal Verification Methodology) a plus.