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PNR Applications Engineer, Staff

at Synopsys

Mid LevelNo visa sponsorshipOther

Posted 18 hours ago

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Compensation: Not specified
City: Not specified
Country: United States

**PNR Applications Engineer, Staff** - Develop & integrate Physical Navigation Reference (PNR) algorithms for autonomous vehicles - Required: 8+ years' experience in computer vision, algorithm design, and C++ programming - Experience with ROS, OpenCV, and MAVLink; PHD preferred but not required - Collaborate cross-functionally to define, implement, and validate PNR solutions - Experience with sensor fusion and navigation technologies - Join Synopsys' leading-edge team driving Pervasive Intelligence innovation

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Business Area Description:

Our Customer Success Group business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

What You’ll Be Doing:

The primary focus of the Physical Design Specialist (PDS) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects.

What You’ll Need:

Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)
RTL to GDSII full flow experience or knowledge is preferable
Strong interest and understanding of Advanced Node & Design methodologies are required.
In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node , Static Timing Analysis, including noise analysis) experience and knowledge are required.
Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred
Back end P&R tools (Fusion Compiler, ICC2, Innovus)
Excellent verbal and written presentation/communication skills are mandatory.
Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position.

Preferred Experience:

BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience.
Tool knowledge: front end Synthesis and back end PnR tools (Fusion Compiler, ICC2 , Design Compiler, Genus),
Tool knowledge: STA (Primetime, Tempus),

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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