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Principal ASIC Digital Verification Engineer- IP Development
at Synopsys
Tech LeadNo visa sponsorshipOther
Posted 17 hours ago
No clicks
- Compensation
- Not specified
- City
- Country
- India
Currency: Not specified
**Principal ASIC Digital Verification Engineer (IP Development) sought in Bengaluru. Experienced Senior Engineer needed for key role in IP development using Verilog, VHDL, and Python. Lead digital verification, drive static and dynamic verification flows using JasperGold, VCS, and other tools. Collaborate cross-functionally, manage tasks, and mentor junior team members.Requires a minimum of 12 years in ASIC digital verification, proficient in formal verification, and familiar with ASIC design flows. Apply today!**
Job Title:
ASIC Digital Verification- Principal Engineer
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly experienced ASIC Verification professional, passionate about solving complex engineering challenges and driving technological excellence. With over 15 years of hands-on experience, you bring a deep understanding of functional verification methodologies, particularly in RTL-based IP Cores that power mission-critical applications in industries such as AI, automotive, and cloud infrastructure. Your technical acumen is matched by your ability to architect robust verification environments, make strategic decisions, and lead teams across global locations.
You thrive in dynamic, fast-paced settings, where collaboration and innovation are at the forefront. Your expertise spans across protocols like DDR, PCIe, AMBA, Ethernet, USB, and MIPI, and you are well-versed in UVM/VMM/OVM methodologies. You are not only proficient in SystemVerilog and object-oriented verification, but you also leverage scripting and programming languages (C/C++, TCL, Perl, Python) to drive productivity and efficiency. Your commitment to quality is unwavering, and you have a keen eye for detail, ensuring coverage-driven verification processes and assertion-based checks are meticulously implemented.
As a Principal Engineer, you are a natural mentor and technical leader, adept at guiding teams, making architectural decisions, and communicating complex ideas with clarity. You value continuous learning, embrace new challenges, and are motivated by the opportunity to work on cutting-edge IP Cores that define the next generation of smart devices. Your experience with functional safety standards (ISO26262, FMEDA) further strengthens your ability to deliver reliable and secure solutions for Synopsys’ global clientele.
You thrive in dynamic, fast-paced settings, where collaboration and innovation are at the forefront. Your expertise spans across protocols like DDR, PCIe, AMBA, Ethernet, USB, and MIPI, and you are well-versed in UVM/VMM/OVM methodologies. You are not only proficient in SystemVerilog and object-oriented verification, but you also leverage scripting and programming languages (C/C++, TCL, Perl, Python) to drive productivity and efficiency. Your commitment to quality is unwavering, and you have a keen eye for detail, ensuring coverage-driven verification processes and assertion-based checks are meticulously implemented.
As a Principal Engineer, you are a natural mentor and technical leader, adept at guiding teams, making architectural decisions, and communicating complex ideas with clarity. You value continuous learning, embrace new challenges, and are motivated by the opportunity to work on cutting-edge IP Cores that define the next generation of smart devices. Your experience with functional safety standards (ISO26262, FMEDA) further strengthens your ability to deliver reliable and secure solutions for Synopsys’ global clientele.
What You’ll Be Doing:Architecting and making strategic decisions on test bench design for IP Core verification. Developing comprehensive verification plans and specifications based on functional requirements. Implementing robust test bench infrastructure and authoring advanced test cases using UVM/VMM/OVM. Driving a coverage-driven verification methodology to ensure thorough validation of IP functionality. Leading technical aspects of the verification team, mentoring junior engineers and collaborating internationally. Providing innovative verification solutions to enhance productivity, performance, and throughput. Engaging in assertion-based verification and coverage closure to guarantee high-quality deliverables. Collaborating with cross-functional teams on functional safety and compliance standards, such as ISO26262 and FMEDA.
The Impact You Will Have:Enable Synopsys to deliver world-class, high-performance IP Cores to global customers in AI, automotive, and cloud sectors. Enhance the robustness and reliability of verification processes, ensuring top-tier quality for end-customer applications. Accelerate time-to-market for Synopsys IP products through optimized verification methodologies and best practices. Drive collaboration and knowledge sharing across international teams, fostering a culture of innovation and excellence. Support functional safety initiatives, contributing to the development of secure and compliant solutions for automotive and mission-critical domains. Influence architectural decisions and technical strategies that shape the future of semiconductor verification.
What You’ll Need:Extensive hands-on experience (15+ years) in ASIC/RTL verification for complex IP Cores. Deep knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, and MIPI. Proficiency in verification methodologies: UVM, VMM, OVM; and SystemVerilog-based, object-oriented coding. Strong skills in scripting/programming languages: C/C++, TCL, Perl, Python. Experience in developing test environments, planning, coverage closure, and assertion-based verification. Exposure to functional safety standards (ISO26262, FMEDA) is highly advantageous.
Who You Are:Innovative thinker with strong problem-solving skills and attention to detail. Effective communicator and collaborator, comfortable working in global, cross-functional teams. Natural leader and mentor, capable of guiding technical teams and driving project success. Self-motivated, able to work independently and proactively seek new solutions. Adaptable and resilient in fast-paced, challenging environments.
The Team You’ll Be A Part Of:
You will join the Solutions Group at our Bangalore Design Center, collaborating with a diverse and talented team of architects, designers, and verification engineers across Synopsys’ global sites. The team is focused on developing advanced functional verification solutions for industry-leading IP Cores, supporting a wide range of applications from server farms and AI/machine learning to automotive systems. Together, you will drive innovation, quality, and scalability in every project.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Principal ASIC Digital Verification Engineer- IP Development
at Synopsys
Back to all Other jobs
S
Industry not specified
Principal ASIC Digital Verification Engineer- IP Development
at Synopsys
Tech LeadNo visa sponsorshipOther
Posted 17 hours ago
No clicks
- Compensation
- Not specified
- City
- Country
- India
Currency: Not specified
**Principal ASIC Digital Verification Engineer (IP Development) sought in Bengaluru. Experienced Senior Engineer needed for key role in IP development using Verilog, VHDL, and Python. Lead digital verification, drive static and dynamic verification flows using JasperGold, VCS, and other tools. Collaborate cross-functionally, manage tasks, and mentor junior team members.Requires a minimum of 12 years in ASIC digital verification, proficient in formal verification, and familiar with ASIC design flows. Apply today!**
Job Title:
ASIC Digital Verification- Principal Engineer
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly experienced ASIC Verification professional, passionate about solving complex engineering challenges and driving technological excellence. With over 15 years of hands-on experience, you bring a deep understanding of functional verification methodologies, particularly in RTL-based IP Cores that power mission-critical applications in industries such as AI, automotive, and cloud infrastructure. Your technical acumen is matched by your ability to architect robust verification environments, make strategic decisions, and lead teams across global locations.
You thrive in dynamic, fast-paced settings, where collaboration and innovation are at the forefront. Your expertise spans across protocols like DDR, PCIe, AMBA, Ethernet, USB, and MIPI, and you are well-versed in UVM/VMM/OVM methodologies. You are not only proficient in SystemVerilog and object-oriented verification, but you also leverage scripting and programming languages (C/C++, TCL, Perl, Python) to drive productivity and efficiency. Your commitment to quality is unwavering, and you have a keen eye for detail, ensuring coverage-driven verification processes and assertion-based checks are meticulously implemented.
As a Principal Engineer, you are a natural mentor and technical leader, adept at guiding teams, making architectural decisions, and communicating complex ideas with clarity. You value continuous learning, embrace new challenges, and are motivated by the opportunity to work on cutting-edge IP Cores that define the next generation of smart devices. Your experience with functional safety standards (ISO26262, FMEDA) further strengthens your ability to deliver reliable and secure solutions for Synopsys’ global clientele.
You thrive in dynamic, fast-paced settings, where collaboration and innovation are at the forefront. Your expertise spans across protocols like DDR, PCIe, AMBA, Ethernet, USB, and MIPI, and you are well-versed in UVM/VMM/OVM methodologies. You are not only proficient in SystemVerilog and object-oriented verification, but you also leverage scripting and programming languages (C/C++, TCL, Perl, Python) to drive productivity and efficiency. Your commitment to quality is unwavering, and you have a keen eye for detail, ensuring coverage-driven verification processes and assertion-based checks are meticulously implemented.
As a Principal Engineer, you are a natural mentor and technical leader, adept at guiding teams, making architectural decisions, and communicating complex ideas with clarity. You value continuous learning, embrace new challenges, and are motivated by the opportunity to work on cutting-edge IP Cores that define the next generation of smart devices. Your experience with functional safety standards (ISO26262, FMEDA) further strengthens your ability to deliver reliable and secure solutions for Synopsys’ global clientele.
What You’ll Be Doing:Architecting and making strategic decisions on test bench design for IP Core verification. Developing comprehensive verification plans and specifications based on functional requirements. Implementing robust test bench infrastructure and authoring advanced test cases using UVM/VMM/OVM. Driving a coverage-driven verification methodology to ensure thorough validation of IP functionality. Leading technical aspects of the verification team, mentoring junior engineers and collaborating internationally. Providing innovative verification solutions to enhance productivity, performance, and throughput. Engaging in assertion-based verification and coverage closure to guarantee high-quality deliverables. Collaborating with cross-functional teams on functional safety and compliance standards, such as ISO26262 and FMEDA.
The Impact You Will Have:Enable Synopsys to deliver world-class, high-performance IP Cores to global customers in AI, automotive, and cloud sectors. Enhance the robustness and reliability of verification processes, ensuring top-tier quality for end-customer applications. Accelerate time-to-market for Synopsys IP products through optimized verification methodologies and best practices. Drive collaboration and knowledge sharing across international teams, fostering a culture of innovation and excellence. Support functional safety initiatives, contributing to the development of secure and compliant solutions for automotive and mission-critical domains. Influence architectural decisions and technical strategies that shape the future of semiconductor verification.
What You’ll Need:Extensive hands-on experience (15+ years) in ASIC/RTL verification for complex IP Cores. Deep knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, and MIPI. Proficiency in verification methodologies: UVM, VMM, OVM; and SystemVerilog-based, object-oriented coding. Strong skills in scripting/programming languages: C/C++, TCL, Perl, Python. Experience in developing test environments, planning, coverage closure, and assertion-based verification. Exposure to functional safety standards (ISO26262, FMEDA) is highly advantageous.
Who You Are:Innovative thinker with strong problem-solving skills and attention to detail. Effective communicator and collaborator, comfortable working in global, cross-functional teams. Natural leader and mentor, capable of guiding technical teams and driving project success. Self-motivated, able to work independently and proactively seek new solutions. Adaptable and resilient in fast-paced, challenging environments. 
The Team You’ll Be A Part Of:
You will join the Solutions Group at our Bangalore Design Center, collaborating with a diverse and talented team of architects, designers, and verification engineers across Synopsys’ global sites. The team is focused on developing advanced functional verification solutions for industry-leading IP Cores, supporting a wide range of applications from server farms and AI/machine learning to automotive systems. Together, you will drive innovation, quality, and scalability in every project.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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