You are a seasoned digital design professional with a passion for architecting and implementing state-of-the-art ASIC solutions. Bringing over a decade of hands-on experience in RTL design, you thrive in complex, multi-site environments and are driven by the challenge of building high-performance IP Cores for consumer and automotive applications. Your expertise spans industry protocols such as UCIe, Ethernet, PCIe, DDR, and more, making you a go-to technical leader for die-to-die communication solutions.

You possess a strong foundation in HDL design flows and have mastered tools including Verilog/SystemVerilog, synthesis, CDC analysis, and static timing. Your background includes the ability to define and drive micro-architectures from functional specifications, and you excel at balancing innovation with quality-driven processes. As a mentor and collaborator, you inspire teams to achieve technical excellence, and your communication skills allow you to interface seamlessly with global colleagues and customers.

You are proactive, detail-oriented, and committed to continuous learning and improvement. Your initiative and problem-solving abilities set you apart, and you are eager to contribute to a culture of innovation at Synopsys. If you’re ready to lead challenging projects and make a tangible impact on next-generation technology, this role is tailored for you.