R&D Power Grid Design and Sign-Off Engineer
at TSMC
Posted 21 hours ago
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The R&D Power Grid Design and Sign-Off Engineer is responsible for designing, analyzing, and verifying power grids for advanced semiconductors. Key responsibilities include creating power grid architecture, performing circuit simulations, and ensuring compliance with design rules and sign-off requirements. You'll need a strong background in power grid design, along with expertise in tools like Cadence Virtuoso, RedHawk, and ANSYS. A minimum of 5 years of experience in power grid design, plus proficiency in Cz or HVLP tools, is required. This role demands a Senior Engineer level, with a proven track record in high-voltage, low-power design, and strong analytical skills. Experience with 28nm and lower nodes is a plus.
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