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RISCV CPU Systems Architecture/RTL Engineer – Senior Level

at Qualcomm

Mid LevelNo visa sponsorshipOther

Posted an hour ago

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Compensation

Not specified

Currency: Not specified

City

San Diego

Country

United States

**Senior RISC-V CPU Systems Architecture/RTL Engineer** needed to design and implement complex RISC-V CPUs. Key responsibilities include: defining microarchitectures, designing pipelined stages, and implementing innovative solutions. Requires 7+ years' experience in CPU architecture and RTL design using Verilog or VHDL. Proficient in RISC-V, C, and Python. Knowledge of SVA and hardware security essential. Familiarity withajes(t)r or codem(Z)r desired. Join us to advance your expertise in RISC-V systems architecture.