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Sr Staff STA Application Engineer

at Synopsys

Back to all Tech Sales jobs
S
Industry not specified

Sr Staff STA Application Engineer

at Synopsys

Tech LeadNo visa sponsorshipTech Sales

Posted 18 hours ago

No clicks

Compensation
Not specified

Currency: Not specified

City
Bengaluru
Country
India

**Sr Staff STA Application Engineer (Bengaluru, India)** Drive silicon-to-system innovation as a **Senior Staff STA Application Engineer** at Synopsys, the global leader in engineering solutions. Dive into the nitty-gritty of silicon timing, leveraging your decade-plus expertise in PrimeTime and timing closure techniques. Key responsibilities involve debug and optimization of timing violations, ensuring successful tape-outs. Proven ability in competitive benchmarking, customer engagement, and navigating complex design trade-offs is essential. Must have worked extensively with process corners, signal integrity, and critical path analysis. Experience with full-chip STA and UPF is a plus. Ideal candidate combines technical depth with strong communication skills to effectively collaborate with cross-functional teams. Join Synopsys to expand your R&D capabilities and ignite the next wave of AI-driven products.

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent a decade or more in the trenches of silicon timing, and you know that the difference between a chip that tapes out on schedule and one that slips by three months often comes down to how well someone understands PrimeTime and can translate that knowledge into action for a stressed design team. You have debugged timing violations at 2 a.m. before a milestone, and you have sat across from skeptical engineering managers explaining why your approach will save them weeks, not cost them risk.

You are equally comfortable running a competitive benchmark that proves tool superiority and sitting with a customer's design team walking through setup and hold violations in their actual netlist. You do not just know the theory of process corners and signal integrity, you have lived through the messiness of real designs where nothing is clean and every decision is a tradeoff. When a customer asks a hard question, you do not deflect, you dig in, and if you do not know the answer, you know exactly who in R&D to pull in and how to frame the problem so it gets solved.

You think in workflows, not features. Training is not about showing slides, it is about making sure the person leaves able to do the thing. At Synopsys, you will work with the team behind the industry-leading STA tool and the customers who depend on it to ship the chips that power everything.


What You'll Be Doing

  • Drive PrimeTime adoption and usage with customers in both pre-sales evaluations and post-sales deployment, including competitive benchmarking, proof-of-concept runs, and technical win strategies
  • Deliver hands-on customer training on Static Timing Analysis workflows, timing closure techniques, process variation analysis, and signal integrity debugging using PrimeTime
  • Provide tape-out support for customer designs, troubleshooting timing violations, setup/hold issues, and corner-case scenarios in real production environments
  • Collaborate with R&D to communicate customer requirements, report tool issues, and drive product enhancements based on field deployment feedback
  • Work closely with sales, marketing, and field teams to articulate PrimeTime's technical advantages to design teams and engineering management
  • Develop and refine TCL-based automation scripts and methodologies that improve customer productivity and timing closure efficiency
  • Support customers through the full design flow, interfacing with synthesis, physical design, extraction, and ECO processes to ensure seamless PrimeTime integration


The Impact You Will Have

  • Accelerate customer tape-out schedules by resolving critical timing issues and enabling faster, more confident timing closure
  • Expand PrimeTime footprint and deepen usage across customer organizations through technical excellence and trusted advisory relationships
  • Influence the PrimeTime product roadmap by translating real-world customer challenges into actionable R&D priorities
  • Reduce customer risk and rework by delivering training and methodologies that prevent common timing pitfalls before they become schedule killers
  • Strengthen Synopsys competitive position by demonstrating measurable performance, capacity, and accuracy advantages in head-to-head evaluations
  • Enable design teams to adopt advanced timing analysis techniques for process variation, multi-mode multi-corner, and signal integrity that improve chip performance and yield
  • Build long-term customer partnerships where Synopsys is seen as an extension of their engineering team, not just a tool vendor


What You'll Need

  • Bachelor's degree in Electrical Engineering or equivalent, with 10+ years of hands-on experience in ASIC/SoC design, timing analysis, or related fields, or Master's degree with 9+ years of experience
  • Deep working knowledge of Synopsys PrimeTime, including hands-on experience running STA, analyzing timing reports, and debugging violations in real customer designs
  • Solid understanding of timing corners, process variations, on-chip variation (OCV), advanced OCV (AOCV), statistical STA, and signal integrity effects on timing
  • Familiarity with the broader digital design flow, including synthesis, place and route, parasitic extraction, and ECO methodologies
  • Strong TCL scripting skills for automation, flow customization, and productivity improvements
  • Demonstrated ability to communicate complex technical concepts clearly to both engineering teams and management, prior customer-facing experience is a strong plus
  • Willingness to travel to customer sites as needed for training, support, and technical engagements


Who You Are

  • You can walk into a customer meeting with a timing report full of violations and walk out with a clear action plan that the design team trusts and can execute
  • You know when to push back on a customer request because the real problem is upstream in their methodology, and you know how to have that conversation without burning the relationship
  • You are comfortable context-switching between a competitive benchmark for a prospect, a tape-out crisis call with an existing customer, and a product enhancement discussion with R&D, all in the same week
  • You treat customer problems like they are your own, not because it is good service, but because you genuinely want to see the design succeed and you know your tool is the reason it will
  • You can explain a nuanced timing tradeoff to an engineering director in two sentences without losing the technical accuracy that matters
  • You stay current on process technology trends, design challenges, and timing methodologies because you know that what worked at 28nm does not always work at 5nm, and your customers need you to know the difference


The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.


Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.


Sr Staff STA Application Engineer

at Synopsys

Back to all Tech Sales jobs
S
Industry not specified

Sr Staff STA Application Engineer

at Synopsys

Tech LeadNo visa sponsorshipTech Sales

Posted 18 hours ago

No clicks

Compensation
Not specified

Currency: Not specified

City
Bengaluru
Country
India

**Sr Staff STA Application Engineer (Bengaluru, India)** Drive silicon-to-system innovation as a **Senior Staff STA Application Engineer** at Synopsys, the global leader in engineering solutions. Dive into the nitty-gritty of silicon timing, leveraging your decade-plus expertise in PrimeTime and timing closure techniques. Key responsibilities involve debug and optimization of timing violations, ensuring successful tape-outs. Proven ability in competitive benchmarking, customer engagement, and navigating complex design trade-offs is essential. Must have worked extensively with process corners, signal integrity, and critical path analysis. Experience with full-chip STA and UPF is a plus. Ideal candidate combines technical depth with strong communication skills to effectively collaborate with cross-functional teams. Join Synopsys to expand your R&D capabilities and ignite the next wave of AI-driven products.

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent a decade or more in the trenches of silicon timing, and you know that the difference between a chip that tapes out on schedule and one that slips by three months often comes down to how well someone understands PrimeTime and can translate that knowledge into action for a stressed design team. You have debugged timing violations at 2 a.m. before a milestone, and you have sat across from skeptical engineering managers explaining why your approach will save them weeks, not cost them risk.

You are equally comfortable running a competitive benchmark that proves tool superiority and sitting with a customer's design team walking through setup and hold violations in their actual netlist. You do not just know the theory of process corners and signal integrity, you have lived through the messiness of real designs where nothing is clean and every decision is a tradeoff. When a customer asks a hard question, you do not deflect, you dig in, and if you do not know the answer, you know exactly who in R&D to pull in and how to frame the problem so it gets solved.

You think in workflows, not features. Training is not about showing slides, it is about making sure the person leaves able to do the thing. At Synopsys, you will work with the team behind the industry-leading STA tool and the customers who depend on it to ship the chips that power everything.


What You'll Be Doing

  • Drive PrimeTime adoption and usage with customers in both pre-sales evaluations and post-sales deployment, including competitive benchmarking, proof-of-concept runs, and technical win strategies
  • Deliver hands-on customer training on Static Timing Analysis workflows, timing closure techniques, process variation analysis, and signal integrity debugging using PrimeTime
  • Provide tape-out support for customer designs, troubleshooting timing violations, setup/hold issues, and corner-case scenarios in real production environments
  • Collaborate with R&D to communicate customer requirements, report tool issues, and drive product enhancements based on field deployment feedback
  • Work closely with sales, marketing, and field teams to articulate PrimeTime's technical advantages to design teams and engineering management
  • Develop and refine TCL-based automation scripts and methodologies that improve customer productivity and timing closure efficiency
  • Support customers through the full design flow, interfacing with synthesis, physical design, extraction, and ECO processes to ensure seamless PrimeTime integration


The Impact You Will Have

  • Accelerate customer tape-out schedules by resolving critical timing issues and enabling faster, more confident timing closure
  • Expand PrimeTime footprint and deepen usage across customer organizations through technical excellence and trusted advisory relationships
  • Influence the PrimeTime product roadmap by translating real-world customer challenges into actionable R&D priorities
  • Reduce customer risk and rework by delivering training and methodologies that prevent common timing pitfalls before they become schedule killers
  • Strengthen Synopsys competitive position by demonstrating measurable performance, capacity, and accuracy advantages in head-to-head evaluations
  • Enable design teams to adopt advanced timing analysis techniques for process variation, multi-mode multi-corner, and signal integrity that improve chip performance and yield
  • Build long-term customer partnerships where Synopsys is seen as an extension of their engineering team, not just a tool vendor


What You'll Need

  • Bachelor's degree in Electrical Engineering or equivalent, with 10+ years of hands-on experience in ASIC/SoC design, timing analysis, or related fields, or Master's degree with 9+ years of experience
  • Deep working knowledge of Synopsys PrimeTime, including hands-on experience running STA, analyzing timing reports, and debugging violations in real customer designs
  • Solid understanding of timing corners, process variations, on-chip variation (OCV), advanced OCV (AOCV), statistical STA, and signal integrity effects on timing
  • Familiarity with the broader digital design flow, including synthesis, place and route, parasitic extraction, and ECO methodologies
  • Strong TCL scripting skills for automation, flow customization, and productivity improvements
  • Demonstrated ability to communicate complex technical concepts clearly to both engineering teams and management, prior customer-facing experience is a strong plus
  • Willingness to travel to customer sites as needed for training, support, and technical engagements


Who You Are

  • You can walk into a customer meeting with a timing report full of violations and walk out with a clear action plan that the design team trusts and can execute
  • You know when to push back on a customer request because the real problem is upstream in their methodology, and you know how to have that conversation without burning the relationship
  • You are comfortable context-switching between a competitive benchmark for a prospect, a tape-out crisis call with an existing customer, and a product enhancement discussion with R&D, all in the same week
  • You treat customer problems like they are your own, not because it is good service, but because you genuinely want to see the design succeed and you know your tool is the reason it will
  • You can explain a nuanced timing tradeoff to an engineering director in two sentences without losing the technical accuracy that matters
  • You stay current on process technology trends, design challenges, and timing methodologies because you know that what worked at 28nm does not always work at 5nm, and your customers need you to know the difference


The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.


Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.


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