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Physical Design Backend Engineer

at Nvidia

Back to all C/C++ jobs
N
Industry not specified

Physical Design Backend Engineer

at Nvidia

Mid LevelNo visa sponsorshipC/C++/C#

Posted 11 hours ago

No clicks

Compensation
Not specified

Currency: Not specified

City
Tel Aviv
Country
Israel

NVIDIA is looking for best-in-class Physical Design Engineers to join our Networking Silicon team, developing high-speed communication devices with top throughput and low latency. You will be part of a dedicated FC team, handling physical design blocks from RTL to GDS, addressing power, area and performance under challenging constraints. The role involves RTL2GDS flows, synthesis, place-and-route, timing closure, PNR/STA/physical verification, and resolving timing and congestion issues across diverse designs. You will contribute to inflows development and collaborate with a deep, expert team to push the boundaries of physical design in cutting-edge silicon.

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

  • be part of a unique FC team of experts who have deep understanding in all FC aspects, especially integration and STA.

  • Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

  • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

  • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

  • Taking part inflows development.

What we need to see:

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

  • Proven experience in RTL2GDS flows and methodologies.

  • Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

  • Deep understanding of all aspects of Physical construction and Integration.

  • Knowledge in Physical Design Verification methodology LVS/DRC.

  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

  • Great teammate.

NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

Physical Design Backend Engineer

at Nvidia

Back to all C/C++ jobs
N
Industry not specified

Physical Design Backend Engineer

at Nvidia

Mid LevelNo visa sponsorshipC/C++/C#

Posted 11 hours ago

No clicks

Compensation
Not specified

Currency: Not specified

City
Tel Aviv
Country
Israel

NVIDIA is looking for best-in-class Physical Design Engineers to join our Networking Silicon team, developing high-speed communication devices with top throughput and low latency. You will be part of a dedicated FC team, handling physical design blocks from RTL to GDS, addressing power, area and performance under challenging constraints. The role involves RTL2GDS flows, synthesis, place-and-route, timing closure, PNR/STA/physical verification, and resolving timing and congestion issues across diverse designs. You will contribute to inflows development and collaborate with a deep, expert team to push the boundaries of physical design in cutting-edge silicon.

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

  • be part of a unique FC team of experts who have deep understanding in all FC aspects, especially integration and STA.

  • Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

  • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

  • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

  • Taking part inflows development.

What we need to see:

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

  • Proven experience in RTL2GDS flows and methodologies.

  • Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

  • Deep understanding of all aspects of Physical construction and Integration.

  • Knowledge in Physical Design Verification methodology LVS/DRC.

  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

  • Great teammate.

NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

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