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Lead and advance design-for-test (DFT) strategy for Qualcomm's SoCs, driving development and optimization of DFT flows and test patterns. Collaborate with RTL, verification, and manufacturing teams to ensure high test coverage and robust yield. Mentor engineers, implement automation, and troubleshoot manufacturing test issues to enable efficient silicon bring-up and production. Drive improvements in DFT methodologies, DFT-aware design guidelines, and tool integration across the design-to-test lifecycle.