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Responsible for designing and verifying ASIC hardware blocks with focus on hardware security features. Work on secure IP development, side-channel analysis, threat modeling, and implementation in low-power, area-efficient designs. Collaborate with FAEs and software teams to integrate security primitives, perform RTL design, linting, and verification. This role requires strong knowledge of digital design, VLSI, and security principles, across the ASIC design flow from concept to tape-out.