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EDA Tools Software Engineer

at Intel

Back to all Python jobs
I
Industry not specified

EDA Tools Software Engineer

at Intel

Mid LevelNo visa sponsorshipPython

Posted 9 hours ago

No clicks

Compensation
$141,910 – $269,100 USD

Currency: $ (USD)

City
Austin
Country
United States

Work on hardware design tools and methodology to advance future hardware design. Design, implement, verify, and support enablement and adoption of advanced EDA tools, flows, and methodologies. Develop extraction runsets and certification across Intel processes, collaborating with EDA vendors and technology specification owners to deliver production-ready extraction solutions. This role requires deep knowledge of digital design, verification, and full-chip integration, and offers opportunities to influence tool flows and power/performance optimization.

Job Details:

Job Description: 

Are you passionate about advancing the future of hardware design through cutting-edge tools and methodologies? Join our dynamic team as a Hardware Design Tools and Methodology Engineer, where you'll play a pivotal role in designing, implementing, verifying, and supporting the enablement and adoption of revolutionary hardware design tools, flows, and methodologies. This is your opportunity to work at the forefront of technology innovation, collaborating with industry leaders to shape the next generation of design automation solutions.

Why Join Us? This is your chance to be part of a team that's revolutionizing hardware design methodologies and making a global impact on technology development. You'll work with cutting-edge tools, collaborate with industry experts, and contribute to innovations that shape the future of semiconductor design.

Ready to drive the future of hardware design automation? Apply now and join our mission to create extraordinary design solutions!

Key Responsibilities:

Design and Implementation Excellence:

  • Design, implement, verify, and support the enablement and adoption of advanced hardware design tools, flows, and methodologies

  • Define comprehensive methodologies for hardware development related to technology nodes and EDA tool enabling

  • Create and verify unique hardware designs, assemble design platforms, and integrate components into hierarchical systems

Technology Innovation:

  • Provide deployment coverage for end-to-end EDA tool testing on new technology nodes

  • Develop, test, and analyze engineering design automation tools, flows, and methodologies to improve efficiency and optimize power and performance

  • Support development and enhancement of platforms, databases, scripts, and tool flows for design automation

Technical Leadership:

  • Build deep understanding of digital design, verification, structural and physical layout, fullchip integration, power and performance, clocking, and/or timing to enhance future TFM development

  • Collaborate with EDA vendors on defining and early testing of next-generation design tools

Specialized Focus Areas: In this role, you will be responsible for developing:

  • Extraction Runset development

  • Extraction tool/flow certification on Intel's process technologies

  • Work collaboratively with technology specification owners and validation teams to ensure high-quality solutions

  • Frequent interaction with Process Development Teams and EDA vendors to enable production-level extraction solutions

Qualifications:

Minimum Qualifications:

  • Bachelor's Degree with 8+ years, OR Master's Degree with 5+ years, OR PhD with 3+ years of experience in Physics, Electrical & Computer Engineering, or related field

  • 3+ years of experience in one of the following skill sets:

    • LVS/Extraction Runset Development in ICV PXL or Calibre SVRF or Pegasus language

    • StarRC or Quantus, or xACT based extraction flows, methodologies and/or certification

    • Scripting knowledge in TCL, Perl, or Python

Preferred Qualifications:

  • 2+ years of experience in Physical Verification/DRC/LVS/PEX/TVF

  • 2+ years of working in Unix/Linux operating system environment

  • 1+ year of experience in 3D IC Extraction (SNPS VIB, or Cadence IDX) flow

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

EDA Tools Software Engineer

at Intel

Back to all Python jobs
I
Industry not specified

EDA Tools Software Engineer

at Intel

Mid LevelNo visa sponsorshipPython

Posted 9 hours ago

No clicks

Compensation
$141,910 – $269,100 USD

Currency: $ (USD)

City
Austin
Country
United States

Work on hardware design tools and methodology to advance future hardware design. Design, implement, verify, and support enablement and adoption of advanced EDA tools, flows, and methodologies. Develop extraction runsets and certification across Intel processes, collaborating with EDA vendors and technology specification owners to deliver production-ready extraction solutions. This role requires deep knowledge of digital design, verification, and full-chip integration, and offers opportunities to influence tool flows and power/performance optimization.

Job Details:

Job Description: 

Are you passionate about advancing the future of hardware design through cutting-edge tools and methodologies? Join our dynamic team as a Hardware Design Tools and Methodology Engineer, where you'll play a pivotal role in designing, implementing, verifying, and supporting the enablement and adoption of revolutionary hardware design tools, flows, and methodologies. This is your opportunity to work at the forefront of technology innovation, collaborating with industry leaders to shape the next generation of design automation solutions.

Why Join Us? This is your chance to be part of a team that's revolutionizing hardware design methodologies and making a global impact on technology development. You'll work with cutting-edge tools, collaborate with industry experts, and contribute to innovations that shape the future of semiconductor design.

Ready to drive the future of hardware design automation? Apply now and join our mission to create extraordinary design solutions!

Key Responsibilities:

Design and Implementation Excellence:

  • Design, implement, verify, and support the enablement and adoption of advanced hardware design tools, flows, and methodologies

  • Define comprehensive methodologies for hardware development related to technology nodes and EDA tool enabling

  • Create and verify unique hardware designs, assemble design platforms, and integrate components into hierarchical systems

Technology Innovation:

  • Provide deployment coverage for end-to-end EDA tool testing on new technology nodes

  • Develop, test, and analyze engineering design automation tools, flows, and methodologies to improve efficiency and optimize power and performance

  • Support development and enhancement of platforms, databases, scripts, and tool flows for design automation

Technical Leadership:

  • Build deep understanding of digital design, verification, structural and physical layout, fullchip integration, power and performance, clocking, and/or timing to enhance future TFM development

  • Collaborate with EDA vendors on defining and early testing of next-generation design tools

Specialized Focus Areas: In this role, you will be responsible for developing:

  • Extraction Runset development

  • Extraction tool/flow certification on Intel's process technologies

  • Work collaboratively with technology specification owners and validation teams to ensure high-quality solutions

  • Frequent interaction with Process Development Teams and EDA vendors to enable production-level extraction solutions

Qualifications:

Minimum Qualifications:

  • Bachelor's Degree with 8+ years, OR Master's Degree with 5+ years, OR PhD with 3+ years of experience in Physics, Electrical & Computer Engineering, or related field

  • 3+ years of experience in one of the following skill sets:

    • LVS/Extraction Runset Development in ICV PXL or Calibre SVRF or Pegasus language

    • StarRC or Quantus, or xACT based extraction flows, methodologies and/or certification

    • Scripting knowledge in TCL, Perl, or Python

Preferred Qualifications:

  • 2+ years of experience in Physical Verification/DRC/LVS/PEX/TVF

  • 2+ years of working in Unix/Linux operating system environment

  • 1+ year of experience in 3D IC Extraction (SNPS VIB, or Cadence IDX) flow

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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